Texas Instruments /MSP432P4111 /LCD_F /LCDANMCTL

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Interpret as LCDANMCTL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LCDANMEN_0)LCDANMEN 0 (LCDANMSTP_0)LCDANMSTP 0 (LCDANMCLR_0)LCDANMCLR 0 (LCDANMPREx_0)LCDANMPREx 0 (LCDANMDIVx_0)LCDANMDIVx

LCDANMDIVx=LCDANMDIVx_0, LCDANMPREx=LCDANMPREx_0, LCDANMSTP=LCDANMSTP_0, LCDANMCLR=LCDANMCLR_0, LCDANMEN=LCDANMEN_0

Description

LCD_F Animation Control Register

Fields

LCDANMEN

Enable Animation

0 (LCDANMEN_0): Animation disabled

1 (LCDANMEN_1): Animation enabled

LCDANMSTP

Number of Amimation frames

0 (LCDANMSTP_0): T0

1 (LCDANMSTP_1): T0 to T1

2 (LCDANMSTP_2): T0 to T2

3 (LCDANMSTP_3): T0 to T3

4 (LCDANMSTP_4): T0 to T4

5 (LCDANMSTP_5): T0 to T5

6 (LCDANMSTP_6): T0 to T6

7 (LCDANMSTP_7): T0 to T7

LCDANMCLR

Clear Animation Memory

0 (LCDANMCLR_0): Contents of animation memory registers LCDANMx remain unchanged

1 (LCDANMCLR_1): Clear content of all animation memory registers LCDANMx

LCDANMPREx

Clock pre-scaler for animation frequency

0 (LCDANMPREx_0): Divide by 512

1 (LCDANMPREx_1): Divide by 1024

2 (LCDANMPREx_2): Divide by 2048

3 (LCDANMPREx_3): Divide by 4096

4 (LCDANMPREx_4): Divide by 8162

5 (LCDANMPREx_5): Divide by 16384

6 (LCDANMPREx_6): Divide by 32768

7 (LCDANMPREx_7): Divide by 65536

LCDANMDIVx

Clock divider for animation frequency

0 (LCDANMDIVx_0): Divide by 1

1 (LCDANMDIVx_1): Divide by 2

2 (LCDANMDIVx_2): Divide by 3

3 (LCDANMDIVx_3): Divide by 4

4 (LCDANMDIVx_4): Divide by 5

5 (LCDANMDIVx_5): Divide by 6

6 (LCDANMDIVx_6): Divide by 7

7 (LCDANMDIVx_7): Divide by 8

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